The Asia-Europe Silicon Photonics Symposium and Course bring industrial and academic technology leaders from the leading ecosystems in the world to bring a full spectrum of perspectives about silicon photonics technology and its applications. This year's edition is organized in collaboration with the Chinese University of Hong Kong and focuses on large scale photonic integration.
The Asia-Europe Silicon Photonics Symposium and Course bring industrial and academic technology leaders from the leading ecosystems in the world to bring a full spectrum of perspectives about silicon photonics technology and its applications.
Once again, ePIXfab has joined forces with JePPIX to organize the 15th edition of the European Photonic Integration Forum (EPIF). EPIF takes place during ECOC, on Wednesday, September 25, from 18:00 until 19:30. The location is room Harmonie 6 on the first floor of the Congress Center Messe Frankfurt.
ePIXfab is collaborating with the China International Optoelectronic Expo (CIOE) to organize ePIXfab's China-Europe Forum at CIOE 2024. The forum will take place on September 13, 2024, at the 25th CIOE in Shenzhen. Register now and stay tuned!
During a 3-day training course you will get practical experience in designing, fabricating and measuring an integrated silicon photonics circuit through tutorials and hands-on sessions given by experts from Ghent University's Photonics Research Group.
Tailored for both industrial and academic participants, ePIXfab Silicon Photonics schools cover the fundamentals to the latest developments in the science and technology of Silicon PIC design, fabrication, assembly and testing for ever-growing applications of Silicon Photonics.
ePIXfab in collaboration with the ELENA, PATTERN, PHORMIC and photonixFAB projects organized a two half-day workshop on heterogeneous integration on April 23-24 2024.
The course focuses on the process to translate a photonic circuit idea into a working chip, going from schematic design and circuit simulation to layout, routing, and interactive design rule checking.
As part of the course, the participants get the opportunity to actually tape out a design that will be fabricated with an e-beam prototyping service and characterized. Based on these results, the design can be improved and submitted to a wafer-scale multi-project-wafer run of which the participants will receive the final chips.